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PD - 95501
IRFP064VPBF
l l l l l l l l
Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Fully Avalanche Rated Optimized for SMPS Applications Lead-Free
HEXFET(R) Power MOSFET
D
VDSS = 60V RDS(on) = 5.5m
G S
ID = 130A
Description
Advanced HEXFET(R) Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-247 package is preferred for commercial-industrial applications where higher power levels preclude the use of TO-220 devices. The TO-247 is similar but superior to the earlier TO-218 package because of its isolated mounting hole.
TO-247AC
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew
Max.
130 95 520 250 1.7 20 130 25 4.7 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V A mJ V/ns C
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.24 ---
Max.
0.60 --- 40
Units
C/W
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07/06/04
IRFP064VPBF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss EAS
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Single Pulse Avalanche Energy
Min. 60 --- --- 2.0 88 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 5.5 m VGS = 10V, ID = 78A 4.0 V VDS = VGS, ID = 250A --- S VDS = 25V, ID = 78A 25 VDS = 60V, VGS = 0V A 250 VDS = 48V, VGS = 0V, TJ = 150C 100 VGS = 20V nA -100 VGS = -20V 260 ID = 130A 68 nC VDS = 48V 94 VGS = 10V, See Fig. 6 and 13 --- VDD = 30V --- ID = 130A ns --- RG = 4.3 --- VGS = 10V, See Fig. 10 Between lead, 5.0 --- 6mm (0.25in.) nH G from package 13 --- and center of die contact 6760 --- VGS = 0V 1330 --- VDS = 25V 290 --- pF = 1.0MHz, See Fig. 5 1880310 mJ IAS = 130A, L = 37H
Typ. --- 0.067 --- --- --- --- --- --- --- --- --- --- 26 200 100 150
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 130 showing the A G integral reverse --- --- 520 S p-n junction diode. --- --- 1.2 V TJ = 25C, IS = 130A, VGS = 0V --- 94 140 ns TJ = 25C, IF = 130A --- 360 540 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
Pulse width 400s; duty cycle 2%. This is a typical value at device destruction and represents
operation outside rated limits.
Starting TJ = 25C, L = 260H
RG = 25, I AS = 50A. (See Figure 12)
ISD 130A, di/dt 230A/s, VDD V(BR)DSS,
TJ 175C
This is a calculated value limited to TJ = 175C . Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 90A.
2
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IRFP064VPBF
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
100
4.5V
10
10
4.5V
20s PULSE WIDTH TJ = 25 C
1 10 100
1 0.1
1 0.1
20s PULSE WIDTH TJ = 175 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.0
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 70A
I D , Drain-to-Source Current (A)
2.5
TJ = 175 C
100
2.0
1.5
TJ = 25 C
10
1.0
0.5
1 4.0
V DS = 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0 10.0
0.0 -60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFP064VPBF
12000
20
10000
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds
ID = 130A VDS = 48V VDS = 30V
16
C, Capacitance(pF)
8000
Ciss
6000
12
8
4000
2000
Coss Crss
4
0 1 10 100
0 0 50 100 150
FOR TEST CIRCUIT SEE FIGURE 13
200 250 300
VDS, Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
10000 OPERATION IN THIS AREA LIMITED BY R DS(on)
TJ = 175 C
ISD , Reverse Drain Current (A)
100
10
ID, Drain-to-Source Current (A)
1000
100 100sec 1msec Tc = 25C Tj = 175C Single Pulse 1 10
1
TJ = 25 C
10
10msec
0.1 0.0
V GS = 0 V
0.4 0.8 1.2 1.6 2.0 2.4
1
VSD ,Source-to-Drain Voltage (V)
100
1000
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFP064VPBF
140
LIMITED BY PACKAGE
120
VDS VGS RG V GS
Pulse Width 1 s Duty Factor 0.1 %
RD
D.U.T.
+
ID , Drain Current (A)
100 80 60 40 20 0 25 50 75 100 125 150 175
-VDD
Fig 10a. Switching Time Test Circuit
VDS 90%
TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50
0.20 0.1 0.10 PDM 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1
0.01 0.00001
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFP064VPBF
15V
EAS , Single Pulse Avalanche Energy (mJ)
600
VDS
L
DRIVER
ID 53A 92A BOTTOM 130A TOP
450
RG
20V
D.U.T
IAS tp
+ V - DD
A
300
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
150
0 25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
VGS
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
IG
ID
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFP064VPBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ VDD
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET(R) power MOSFETs
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IRFP064VPBF
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
TO-247AC Part Marking Information
EXAMPLE: THIS IS AN IRFPE30 WIT H ASS EMBLY LOT CODE 5657 ASS EMBLED ON WW 35, 2000 IN THE ASS EMBLY LINE "H"
Note: "P" in assembly line position indicates "Lead-Free"
PART NUMBER INT ERNATIONAL RECT IFIER LOGO AS S EMBLY LOT CODE
IRFPE30
56 035H 57
DATE CODE YEAR 0 = 2000 WEEK 35 LINE H
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 07/04
8
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